The Ministry of Electronics and Information (MeitY) has brought up applications from 100 academia, R&D organisations, start-ups and MSMEs under its Chips to Startup (C2S) Programme.

The C2S programme aims to train 85,000 number of high-quality and qualified engineers in the area of Very large-scale integration (VLSI) and embedded system design.

The government says, will be a step towards leapfrogging in the Electronics System Design and Manufacturing (ESDM) space by way of inculcating the culture of SoC/ System Level Design at Bachelors, Masters and Research level and act as a catalyst for growth of start-ups involved in fabless design.

The programme will be implemented at about 100 academic institutions, R&D organisations across the country, including IITs, NITs, IIITs, Government/Private Colleges and R&D organisations.

Startups and MSMEs can also participate in the programme. The C2S Programme brings each entity of the value chain in electronics viz. quality manpower training, research and development, hardware IPs design, system design, application-oriented R&D, prototype design and deployment with the help of academia, industry, start-ups and R&D establishments.

Under the Programme, based on the Institutions' expertise, Technology Readiness Level (TRL) and design experience acquired during earlier SMDP Programmes, proposals are invited in three different categories, i.e., Design and Development of Systems/SoCs/ASICs/Reusable IP Core(s), Development of Application Oriented Working Prototype of IPs/ASICs/SoCs, and Proof of Concept oriented Research and Development of ASICs/FPGAs.

C-DAC (Centre for Development of Advanced Computing), a scientific society operating under MeitY, will serve as the nodal agency for the programme.